型号 |
厂家 |
描述 |
大小 |
页数 |
厂家标志 |
NB4N507ADG | ON SEMICONDUCTOR | 3.3V/5V, 50 MHz to 200 MHz PECL Clock Synthesizer | 124 KB | 7 | |
NB4N840MMNG | ON SEMICONDUCTOR | 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination | 99 KB | 9 | |
NB4N527SMNG | ON SEMICONDUCTOR | 3.3V, 2.5Gb/s Dual AnyLevel⑩ to LVDS Receiver/Driver/Buffer/Translator with Internal Input Termination | 109 KB | 10 | |
NB4N507ADR2G | ON SEMICONDUCTOR | 3.3V/5V, 50 MHz to 200 MHz PECL Clock Synthesizer | 124 KB | 7 | |
NB4N855SMR4G | ON SEMICONDUCTOR | 3.3 V, 1.5 Gb/s Dual AnyLevel TM to LVDS Receiver/Driver/Buffer/ Translator | 187 KB | 9 | |
NB4N441MNG | ON SEMICONDUCTOR | 3.3V Serial Input MultiProtocol PLL Clock Synthesizer, Differential LVPECL Output | 88 KB | 12 | |
NB4L16MMNG | ON SEMICONDUCTOR | 2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Translator with Internal Termination | 919 KB | 12 | |
NB4L6254FAG | ON SEMICONDUCTOR | 2.5V / 3.3V Differential LVPECL 2x2 Clock Switch and Low Skew Fanout Buffer | 137 KB | 9 | |
NB4N507AD | ON SEMICONDUCTOR | 3.3V/5V, 50 MHz to 200 MHz PECL Clock Synthesizer | 124 KB | 7 | |
NB4N840MMNR4G | ON SEMICONDUCTOR | 3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination | 99 KB | 9 | |
NB4N507ADR2 | ON SEMICONDUCTOR | 3.3V/5V, 50 MHz to 200 MHz PECL Clock Synthesizer | 124 KB | 7 | |
NB4N316MDTG | ON SEMICONDUCTOR | 3.3 V AnyLevel Receiver to CML Driver/Translator with Input Hysteresis | 206 KB | 12 | |
NB4N7132DTR2G | ON SEMICONDUCTOR | Link Replicator for Fibre Channel, Gigabit Ethernet, HDTV and SATA | 103 KB | 6 | |
NB4L52MNG | ON SEMICONDUCTOR | 2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVPECL Translator w/ Internal Termination | 135 KB | 8 | |
NB4N855SMR4 | ON SEMICONDUCTOR | 3.3 V, 1.5 Gb/s Dual AnyLevel TM to LVDS Receiver/Driver/Buffer/ Translator | 187 KB | 9 | |
NB4N527SMN | ON SEMICONDUCTOR | 3.3V, 2.5Gb/s Dual AnyLevel⑩ to LVDS Receiver/Driver/Buffer/Translator with Internal Input Termination | 109 KB | 10 | |